Cognitive Layering in Embedded Computing

Chris Rowen

Chris Rowen

(Cadence Design System's IP Group)

Play Video (Stanford)

Play Video (SystemX Members)

❏ Lecture Slides (Stanford)

❏ Lecture Slides (SystemX Members)

Date: October 29, 2015

Description:

Embedded computing is often computing with extremes – extreme low cost, extreme low energy, extreme low latency, extreme high computation rates. Increasingly, it is about extreme responsiveness, connectedness and intelligence. Systems often need to maintain the energy illusion of “always off” and the computational illusion of “always on”. This talk addresses this seeming paradox with the notion of ‘cognitive layering’, a hierarchy of processing subsystems making widely shifting trade-offs between generality and efficiency. Along the way we touch on key emerging embedded computing functions in vision, convolutional neural networks, ultra-low-power processing and distributed software environments.

Further Information:

Dr. Chris Rowen is the Chief Technology Officer for Cadence’s IP Group. He is developing extensible processor IP that can be configured easily into custom chips for applications in wireless, peripheral control, imaging, and other areas. Chris joined Cadence after its acquisition of Tensilica, the company he founded to develop extensible processors. He built Tensilica to the point where its processors had more than 200 licensees, including seven of the top 10 chip companies, and who had shipped more than 2 billion cores. Before founding Tensilica, he was VP and General Manager of the Design Reuse Group at Synopsys. Dr Rowen also was a pioneer in developing RISC architecture and helped to start MIPS Computer Systems, where he was Vice President for Microprocessor Development. He holds an MSEE and PhD in electrical engineering from Stanford (working under John Hennessy) and a BA in physics from Harvard.




Created: Friday, October 30th, 2015